Protel 99 SE電路設(shè)計(jì)與仿真

第1章 初識(shí)Protel 99 SE                   
                   
 1.1 Protel 99 SE的發(fā)展歷史                   
 1.2 Protel 99 SE的組成和特點(diǎn)                   
 1.2.1 Protel 99 SE的組成                   
 1.2.2 Protel 99 SE的新特性                   
 1.3 Protel 99 SE的運(yùn)行環(huán)境                   
 1.4 系統(tǒng)參數(shù)的設(shè)置                   
 1.4.1 界面字體的設(shè)置                   
 1.4.2 系統(tǒng)其他參數(shù)的設(shè)置                   
 1.5 關(guān)于使用本書的幾點(diǎn)說明                   
                   
 第2章 Protel 99 SE基礎(chǔ)入門                   
                   
 2.1 電路設(shè)計(jì)的概念                   
 2.2 啟動(dòng) Protel 99 SE                   
 2.3 進(jìn)入 Protel 99 SE                   
 2.3.1 Protel 99 SE菜單欄                   
 2.3.2 菜單欄屬性的設(shè)置                   
 2.3.3 Protel 99 SE系統(tǒng)菜單                   
 2.3.4 設(shè)計(jì)管理器                   
 2.3.5 狀態(tài)及命令指示行                   
 2.3.6 自然語言幫助系統(tǒng)                   
 2.4 創(chuàng)建項(xiàng)目數(shù)據(jù)庫                   
 2.5 設(shè)計(jì)工作組的管理                   
 2.6 進(jìn)入設(shè)計(jì)                   
 2.6.1 選擇設(shè)計(jì)服務(wù)器                   
 2.6.2 服務(wù)器的種類                   
                   
 第3章 設(shè)計(jì)電路原理圖                   
                   
 3.1 設(shè)計(jì)原理圖的一般步驟                   
 3.2 啟動(dòng)原理圖設(shè)計(jì)系統(tǒng)                   
 3.3 畫面的管理                   
 3.3.1 工具欄的打開與關(guān)閉                   
 3.3.2 面板顯示狀態(tài)的縮. 放                   
 3.4 設(shè)置圖紙                   
 3.4.1 設(shè)置圖幅                   
 3.4.2 設(shè)置文件信息對(duì)話框                   
 3.5 在工作平面上放置元件                   
 3.5.1 利用元件庫管理瀏覽器放置元件                   
 3.5.2 利用菜單命令放置元件                   
 3.5.3 元件位置的調(diào)整                   
 3.5.4 元件的剪貼                   
 3.5.5 元件的刪除                   
 3.5.6 元件的排列與對(duì)齊                   
 3.5.7 陣列式粘貼                   
 3.5.8 元件屬性的編輯                   
 3.6 制作原理圖元件                   
 3.6.1 啟動(dòng)原理圖元件庫編輯服務(wù)器                   
 3.6.2 元件管理器工具                   
 3.6.3 常用畫圖工具介紹                   
 3.6.4 制作實(shí)例                   
 3.7 繪制電路原理圖                   
 3.7.1 繪制原理圖的工具和方法                   
 3.7.2 畫導(dǎo)線                   
 3.7.3 畫總線                   
 3.7.4 畫總線分支                   
 3.7.5 放置線路節(jié)點(diǎn)（Junction）                   
 3.7.6 電源與接地符號(hào)                   
 3.7.7 設(shè)置網(wǎng)絡(luò)標(biāo)號(hào)                   
 3.7.8 制作電路的I／O端口                   
 3.8 使用畫圖工具繪圖                   
 3.8.1 畫圖工具各個(gè)按鈕的功能                   
 3.8.2 繪制直線                   
 3.8.3 繪制多邊形                   
 3.8.4 繪制圓弧與橢圓弧                   
 3.8.5 放置說明文字                   
 3.8.6 放置文本框                   
 3.8.7 繪制矩形                   
 3.8.8 繪制圓與橢圓                   
 3.8.9 繪制餅圖                   
 3.8.10 插入圖片                   
 3.8.11 繪制Bezier曲線                   
 3.8.12 繪制圖形實(shí)例                   
 3.9 設(shè)置原理圖的環(huán)境參數(shù)                   
 3.9.1 設(shè)置原理圖環(huán)境                   
 3.9.2 設(shè)置圖形編輯環(huán)境                   
 3.9.3 設(shè)置默認(rèn)原始環(huán)境                   
                   
 第4章 給制原理圖高級(jí)知識(shí)                   
                   
 4.1 層次原理圖的設(shè)計(jì)                   
 4.1.1 層次原理圖的設(shè)計(jì)方法                   
 4.1.2 建立層次原理圖                   
 4.1.3 不同層次電路之間的切換                   
 4.1.4 由方塊電路符號(hào)產(chǎn)生新原理圖中的I／O端口符號(hào)                   
 4.1.5 由原理圖文件產(chǎn)生方塊電路符號(hào)                   
 4.2 電氣法則測(cè)試                   
 4.3 報(bào)表的生成                   
 4.3.1 網(wǎng)絡(luò)表                   
 4.3.2 元件列表的生成                   
 4.3.3 層次項(xiàng)目組織列表                   
 4.3.4 元件交叉參考表                   
 4.3.5 產(chǎn)生引腳列表                   
 4.3.6 比較兩個(gè)網(wǎng)絡(luò)表文件                   
 4.4 原理圖的輸出                   
                   
 第5章 高級(jí)電路圖混合仿真                   
                   
 5.1 概述                   
 5.2 SIM 99仿真庫中的元器件                   
 5.2.1 電阻                   
 5.2.2 電容                   
 5.2.3 電感                   
 5.2.4 二極管                   
 5.2.5 三極管                   
 5.2.6 JFET結(jié)型場(chǎng)效應(yīng)管                   
 5.2.7 MOS場(chǎng)效應(yīng)管                   
 5.2.8 MES場(chǎng)效應(yīng)管                   
 5.2.9 電壓／電流控制開關(guān)                   
 5.2.10 熔絲                   
 5.2.11 晶振                   
 5.2.12 繼電器（RELAY）                   
 5.2.13 互感器（電感耦合器）                   
 5.2.14 傳輸線                   
 5.2.15 TTL和CMOS數(shù)字電路器件                   
 5.2.16 集成塊                   
 5.3 SIM 99中的激勵(lì)源描述                   
 5.3.1 直流源                   
 5.3.2 正弦仿真源                   
 5.3.3 周期脈沖源                   
 5.3.4 分段線性源(Prece-Wise-Liner Source)                   
 5.3.5 指數(shù)激勵(lì)源                   
 5.3.6 單頻調(diào)頻源                   
 5.3.7 線性受控源                  
 5.3.8 非線性受控源                   
 5.3.9 頻率／電壓轉(zhuǎn)換器                   
 5.3.10 壓控振蕩器（VCO）仿真源                   
 5.4 初始狀態(tài)的設(shè)置                   
 5.4.1 節(jié)點(diǎn)電壓設(shè)置NS                   
 5.4.2 初始條件設(shè)置IC                   
 5.5 仿真器的設(shè)置                   
 5.5.1 進(jìn)入分析（Analysis）主菜單                   
 5.5.2 瞬態(tài)特性分析（Transient Analysis）                   
 5.5.3 傅里葉分析（ Fourier）                   
 5.5.4 交流小信號(hào)分析（AC Small Signal Analysis）                   
 5.5.5 直流分析（DC Sweep Analysis）                   
 5.5.6 蒙特卡羅分析（ Monte Carlo Analysis）                   
 5.5.7 掃描參數(shù)分析（Parameter Sweep Analysis）                   
 5.5.8 掃描溫度分析（TemPerature Sweep Analysis）                   
 5.5.9 傳遞函數(shù)分析                   
 5.5.10 噪聲分析（Nolse Analysis）                   
 5.6 設(shè)計(jì)原理圖文件                   
 5.7 仿真原理圖                   
 5.8 模擬電路仿真實(shí)例                   
 5.9 數(shù)字電路仿真實(shí)例                   
                   
 第6章 印制電路板的設(shè)計(jì)                   
                   
 6.1 印制電路板設(shè)計(jì)的一般步驟                   
 6.2 啟動(dòng)PCB設(shè)計(jì)系統(tǒng)                   
 6.3 畫面的管理                   
 6.3.1 窗口的管理                   
 6.3.2 PCB設(shè)計(jì)系統(tǒng)工具欄                   
 6.3.3 編輯區(qū)的管理                   
 6.4 設(shè)置電路板工作層面                   
 6.4.1 電路板的結(jié)構(gòu)                   
 6.4.2 工作層面的類型                   
 6.4.3 板層管理器                   
 6.4.4 工作層面的設(shè)置                   
 6.5 其他環(huán)境的設(shè)置                   
 6.6 制作 PCB元件                   
 6.6.1 啟動(dòng)元件封裝庫編輯服務(wù)器                   
 6.6.2 制作PCB元件封裝                   
 6.6.3 元件封裝庫管理器                   
 6.6.4 創(chuàng)建項(xiàng)目元件封裝庫                   
 6.7 單面板與多層板制作簡介                   
 6.8 雙面板的制作                   
 6.8.1 準(zhǔn)備原理圖和網(wǎng)絡(luò)表                   
 6.8.2 電路板的規(guī)劃                   
 6.8.3 網(wǎng)絡(luò)表和元件的裝入                   
 6.8.4 元件的布局                   
 6.8.5 電路板的布線過程                   
 6.8.6 手工調(diào)整                   
 6.9 繪圖工具簡介                   
 6.9.1 繪制導(dǎo)線                   
 6.9.2 繪制圓弧                   
 6.9.3 放置焊盤                   
 6.9.4 放置導(dǎo)孔                   
 6.9.5 放置文字                   
 6.9.6 放置坐標(biāo)指示                   
 6.9.7 設(shè)置尺寸標(biāo)注                   
 6.9.8 放置相對(duì)原點(diǎn)                   
 6.9.9 放置填充                   
 6.9.10 放置無件                   
 6.10 PCB報(bào)表的輸出                   
 6.10.1 引腳信息報(bào)表                   
 6.10.2 生成電路板信息報(bào)表                   
 6.10.3 生成零件報(bào)表                   
 6.10.4 生成NC鉆孔報(bào)表                   
 6.10.5 生成電路特性報(bào)表                   
 6.10.6 其他相關(guān)輸出                   
 6.11 電路板的輸出                   
                   
 第7章 高級(jí)PCB信號(hào)完整性分析                   
                   
 7.1 設(shè)置信號(hào)完整性分析規(guī)則                   
 7.1.1 飛升時(shí)間的下降邊沿（Flight Time-Falling Edge）                   
 7.1.2 飛升時(shí)間的上升邊沿（Flight Time-Rising Edge）                   
 7.1.3 阻抗限制（ Impedance Constraint）                   
 7.1.4 信號(hào)過沖的下降邊沿（Overshoot-Falling Edge）                   
 7.1.5 信號(hào)過沖的上升邊沿（Overshoot-Rising Edge）                   
 7.1.6 信號(hào)基值（Basic Value）                   
 7.1.7 激勵(lì)信號(hào)（Signal Stimulus）                   
 7.1.8 信號(hào)高值（Signal Top Value）                   
 7.1.9 下降邊沿斜率（Slop-Falling Edge）                   
 7.1.10 上升邊沿斜率（Slope-Rising Edge）                   
 7.1.11 供電網(wǎng)絡(luò)標(biāo)號(hào)（Supply Nets）                   
 7.1.12 信號(hào)下沖的下降邊沿（Undershoot-Faling Edge）                   
 7.1.13 信號(hào)下沖的上升邊沿（Undershoot-Rising Edge）                   
 7.1.14 板層堆棧設(shè)置（Layer Stack）                   
 7.2 PCB板的DRC檢查                   
 7.3 內(nèi)部完整性仿真器                   
 7.3.1 File菜單                   
 7.3.2 Edit菜單                   
 7.3.3 Simulation菜單                   
 7.3.4 Libfary菜單                   
 7.3.5 Options菜單                   
 7.4 波形分析器                   
                   
 第8章 高級(jí)可編程器件的設(shè)計(jì)                   
                   
 8.1 走進(jìn)PLD                   
 8.1.1 PLD的發(fā)展簡史                   
 8.1.2 Advanced PLD 99的新特點(diǎn)                   
 8.2 PLD 99設(shè)計(jì)基礎(chǔ)                   
 8.2.1 PLD的一般設(shè)計(jì)過程                   
 8.2.2 CUPL語言和語法                   
 8.3 CUPL源文本文件的生成                   
 8.3.1 明確所設(shè)計(jì)的PLD系統(tǒng)                   
 8.3.2 創(chuàng)建源文件                   
 8.3.3 方程式的定義                   
 8.3.4 目標(biāo)器件的選擇                   
 8.3.5 源文件中管腳的定義                   
 8.3.6 CUPL文本源文件的直接生成及其設(shè)置                   
 8.4 CUPL源原理圖的生成                   
 8.4.1 CUPL源原理圖模板的生成                   
 8.4.2 在工作平面上放置元件                   
 8.4.3 元件屬性的修改                   
 8.4.4 繪制PLD原理圖                   
 8.5 PLD文本源文件的編譯                   
 8.5.1 PLD編譯器的設(shè)置（Configure）                   
 8.5.2 CUPL源文件的編譯                   
 8.6 PLD源原理圖文件的編譯                   
 8.7 PLD 99原文件的仿真                   
 8.7.1 創(chuàng)建仿真測(cè)試向量文件                   
 8.7.2 仿真所設(shè)計(jì)的邏輯器件                   
 8.7.3 檢查仿真波形